Graphite-based structures, e.g. graphene quantum dots, graphene nanoribbons (GNRs), graphene nanonetworks, graphene plasmonics and graphene super-lattices, exhibit many exceptional chemical, mechanical, electronic and optical properties, and are very desirable for use in electronic devices, composite materials, and energy generation and storage. Such graphite-based structures in general comprise a graphene layer, typically nanometers thick and having a characteristic dimension also in the nanometers range. For example, in order to obtain adequate band gaps for operation at room temperature, GNRs typically have a width within a few nanometers due to the inverse relationship between the band gap and the width of the GNRs. The specific geometrical requirements impose challenges in the development of fabrication methods that can produce graphite-based structures with controllable and reliable topography to achieve desired functionalities.
Another challenge in the development of fabrication methods is related to packing density. The ability to pack structures and devices onto a surface with high packing density is an important issue. Because packing density or workable surface area determines functionalities of devices such as efficiency of solar cells or detectors, extensive work has been dedicated to isolation of graphene layers and attempted to reduce or eliminate workable surface area loss. However, current techniques use horizontal isolation, resulting in workable surface area loss and thus a dissatisfactory yield.
Current methods for fabricating such graphite-based structures are complicated, expensive, inefficient and highly inconsistent, and are mainly limited to laboratories. These methods can be broadly classified as epitaxial growth, chemical vapor deposition (CVD) growth, colloidal suspension, unconventional methods and exfoliation (See, e.g., Jayasen and Subbiah, 2011, Nanoscale Research Letter, 6:95; Parrish, “Graphene Growth Techniques for Use in Nanoelectronics).
The exfoliation method involves separation of a thin layer from the bulk material. This technique can be further classified into thermal, chemical and mechanical methods. Mechanical exfoliation methods under development include the use of a sharp single crystal diamond wedge (See, Jayasen and Subbiah, 2011, Nanoscale Research Letter, 6:95), an atomic force microscope (See, Liu et al., 2005, Applied Physics Letters 86, 073104), and adhesive tapes (See, Liu et al., 2010, Applied Physics Letters 96, 201909 and Chang et al., 2010, Applied Physics Letters 97, 211102) to cleave a highly ordered pyrolytic graphite (HOPG) sample. The use of adhesive tapes for mechanical cleavage is the popular method because it is simple and cost-effective. However, using current mechanical exfoliation methods, it is difficult to predict the number of peels required to obtain the desired thickness of the thin layer (See, Jayasen and Subbiah, 2011, Nanoscale Research Letter, 6:95). Microstructure damage, such as stripes and corrugated kinks, have also been observed in the thin layers produced by current mechanical exfoliation methods (See, Liu et al., 2010, Applied Physics Letters, 96, 201909).
In the last few years, various methods have been developed in an attempt to fabricate graphite-based structures while achieving desired size, specified geometries, and characterized electronic properties of the graphite-based structures. These methods include (1) the combination of e-beam lithography and oxygen plasma etching; (2) stripping of graphite that is sonochemically processed; (3) bottom-up chemical synthesis, e.g., by cyclodehydrogenation of 1,4-diiodo-2,3,5,6-tetraphenylbenzene, or 10,10′-dibromo-9,9′-bianthryl, polyanthrylene oligomers self-assembled on Au(111), Ag(111) or silica substrates; (4) electrochemical etching of graphene by scanning tunneling microscopy (STM) with high bias potential; (5) catalytic unzipping using metal nanoparticles on graphene; (6) chemical unzipping of carbon nanotubes, e.g., by argon plasma etching or oxidation; (7) etching with a nanowire mask; and (8) oxidative unzipping and cutting large scale graphene into GNRs.
While a width on the order of nanometers can be achieved using the above-identified methods, there are many drawbacks to using such methods. For example, the stripping of graphite that is sonochemically processed yields a large distribution of ribbon width, random edge directions, and a percentage yield around 0.5 percent. Similarly, bottom-up chemical synthesis suffers from difficulties in controlling edge geometry and size. Electrochemical etching of graphene by scanning tunneling microscopy (STM) with high bias potential is expensive and time-consuming. Catalytic unzipping using metal nanoparticles on graphene as well as chemical unzipping of carbon nanotubes, referenced above, are limited by the availability of carbon nanotubes. Etching with a nanowire mask is hindered by the complexity and difficulty in the positioning of nanowires. In addition, oxidative unzipping and cutting large scale graphene into GNRs is limited by a lack of control in the initial cutting position, the direction of cutting, and the spacing between different cuts. Consequently, the methods referenced above produce graphite-based structures with less usable surface area and dissatisfactory shapes and sizes.
On the other hand, economical synthesis of large-scale graphene sheets has been attempted. One particular method is characterized by CVD growth of graphene, making use of a high temperature furnace at a low or vacuum pressure to deposit atoms onto on a metal substrate (Parrish, “Graphene Growth Techniques for Use in Nanoelectronics,” last accessed from cerc.utexas.edu/˜kparrish/class/Graphene_Synthesis.pdf on Dec. 6, 2012). Different metal substrates have been used to grow graphene via CVD, such as platinum, iridium, ruthenium, nickel, and copper. Copper is a suitable substrate due to the success in etching away the substrate, the success in transferring the graphene from the copper, the low solubility of carbon in copper, and the relatively low cost of copper. One issue with CVD is the difference in thermal expansion coefficient between the substrate and the graphene sheets, leading to rippling. Another issue is transferring the graphene sheets to a different substrate if needed.
Another method is characterized by epitaxial growth of graphene. It is a heteroepitaxial process using a seed crystal to grow an identical crystal structure in a different substrate. Because of this, epitaxial growth requires careful substrate choice in order to recreate the hexagonal lattice of graphene (See, Parrish, “Graphene Growth Techniques for Use in Nanoelectronics,” last accessed Dec. 6, 2012 from cerc.utexas.edu/˜kparrish/class/Graphene_Synthesis.pdf. Materials explored for use as suitable substrates include silicon carbide, silicon, germanium, and transition metal materials such as iridium(111), ruthenium(0001), platinum(111), cobalt(0001), nickel(111), and palladium(111). A popular substrate comprises silicon carbide (SiC).
In one approach, a SiC substrate is heated to an elevated temperature, thereby thermally decomposing the substrate and leaving carbon to form graphene sheets on a substrate surface. An example in which silicon carbide substrate is used for graphene growth is found in Deheer, International Publication No. WO 201225898. Deheer discloses a method for making a graphitic ribbon through annealing silicon carbide. The resultant graphene feature has a V-shaped cross section in a face of a carbide crystal.
One issue with growing graphene using SiC exists in the difficulty of controlling the number of graphene sheets and the grain sizes. Thus, to date, graphene growth using SiC substrates has yielded structures with unsatisfactory mobility characteristics (Berger et al. “Electronic Confinement and Coherence in Patterned Epitaxial Graphene” Science, 2006, 312(5777) 1191-6 and 1-lass et al. “Why Multilayer Graphene on 4H—SiC(0001) Behaves Like a Single Sheet of Graphene” Phys. Rev. Lett. 2008, 100, 125504). Another issue exists in growing isolated graphene layers on selected surfaces since graphene grows on all untreated SiC surfaces. Additional subsequent processes such as etching are required to remove the graphene layer from surfaces where graphene growth is undesired and to isolate the desirable graphene layers.
To control the number of graphene sheets, substrates other than SiC have been explored. One such example is disclosed in Appleton and Gila (See, U.S. Patent Application No. 2012/0003438 A1). Appleton and Gila describe a method for fabricating a graphene feature by forming an amorphous carbon doped semiconductor on the crystalline semiconductor substrate and then epitaxially crystallizing the amorphous semiconductor with carbon migration to the surface. Appleton and Gila attempt to fabricate a graphene feature over a large area.
Given the above background, there is a need in the art for fabrication methods that are simple and at the same time can produce controllable, reliable and precise graphite-based structures with high packing density.